发明名称 |
Contact structure and extension formation for III-V nFET |
摘要 |
FinFET devices including III-V fin structures and silicon-based source/drain regions are formed on a semiconductor substrate. Silicon is diffused into the III-V fin structures to form n-type junctions. Leakage through the substrate is addressed by forming p-n junctions adjoining the source/drain regions and isolating the III-V fin structures under the channel regions. |
申请公布号 |
US9524882(B2) |
申请公布日期 |
2016.12.20 |
申请号 |
US201514930258 |
申请日期 |
2015.11.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Basker Veeraraghavan S.;Reznicek Alexander |
分类号 |
H01L21/20;H01L29/66;H01L29/78;H01L21/322;H01L21/02;H01L21/84;H01L29/267;H01L27/088;H01L21/8238;H01L27/12 |
主分类号 |
H01L21/20 |
代理机构 |
Otterstedt, Ellenbogen & Kammer, LLP |
代理人 |
Morris Daniel P.;Otterstedt, Ellenbogen & Kammer, LLP |
主权项 |
1. A method comprising:
obtaining a semiconductor structure including a semiconductor substrate and a plurality of columns extending from the semiconductor substrate, the columns being separated by a plurality of recesses, each of the columns including a III-V base and a III-V fin structure, the III-V fin structure being positioned on the III-V base; epitaxially growing a silicon-containing layer on the semiconductor substrate and within the recesses such that a portion of the silicon-containing layer adjoins the III-V fin structures, wherein epitaxially growing the silicon-containing layer includes epitaxially growing a first, p-type silicon layer on the semiconductor substrate and a second silicon layer on the first, p-type silicon layer; causing diffusion of silicon from the silicon-containing layer into the III-V fin structures to form n-type junctions, and forming n-type source/drain regions from the second silicon layer. |
地址 |
Armonk NY US |