发明名称 |
Semiconductor memory device having a burn-in control circuit and burn-in test method thereof |
摘要 |
A burn-in test circuit for a semiconductor memory device tests for defective memory cells. The test circuit applies a test signal that turns "off" transistors in a precharge circuit and applies a select signal to memory cells at predetermined intervals. The select signal and test signal are delayed for different time intervals depending on whether the memory device is transitioning from a normal operating mode to a test mode or from the test mode to the normal operating mode. The selective delay prevents overcurrent conditions from occurring during the mode transitions.
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申请公布号 |
US5732032(A) |
申请公布日期 |
1998.03.24 |
申请号 |
US19960715549 |
申请日期 |
1996.09.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK, HEE-CHOUL;KWON, KOOK-HWAN |
分类号 |
G11C11/413;G11C29/00;G11C29/06;G11C29/50;(IPC1-7):G11C29/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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