Halbleiterbauteil mit MOS-Gatesteuerung und Verfahren zu seiner Herstellung

摘要

An MOS-gated power semiconductor device is formed by a process in which a self-aligned device cell is formed, without any critical alignments thereby allowing the cell density to be increased. A sidewall spacer 62 is used to mask the etching of a depression in the silicon to reduce the number of critical mask alignment steps. An optional selectively formed metal connects the polysilicon layer to the P+ and N+ diffusion regions. The sidewall spacer, in combination with the selectively formed metal, prevents impurities from diffusing to the parasitic DMOS channels and inverting them to cause leakage. A termination structure may also be formed by this process.