发明名称 Processor subsystem for use with a universal computer architecture
摘要 A processor subsystem includes a processor and a bus bridge conversion device for insertion into a slot of a host computer system. The processor operates according to a signaling protocol which is different than the signaling protocol of the computer system bus. The bus conversion device converts the signaling protocol of the system bus to the signaling protocol of the processor, and vice-versa. The bus conversion device includes logic for bus arbitration conversion, bus lock conversion, and cache coherency control. Logic is also included that converts incoming and outgoing requests so that the card may properly transact with other agents coupled to the bus.
申请公布号 US5764934(A) 申请公布日期 1998.06.09
申请号 US19960675854 申请日期 1996.07.03
申请人 INTEL CORPORATION 发明人 FISCH, MATTHEW A.;JACOBSON, JR., JAMES E.;RHODEHAMEL, MICHAEL W.
分类号 G06F13/36;G06F13/38;G06F13/40;G06F13/42;(IPC1-7):G06F15/76 主分类号 G06F13/36
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