| 摘要 |
PROBLEM TO BE SOLVED: To provide such an image signal line delay circuit as being capable of requiring only one memory controller to reduce the power consumption. SOLUTION: A SRAM 8 has a capacity of N×W×L, where the number of lines is N, the width of bits in one line is W and the number of words required to store image signals in one line is L, controls a writing timing for the SRAM 8 with a line memory control circuit 6, writes line data for every horizontally scanning period into an area containing a memory, writes the next line into another area, prompts writing for every line in an area, where the oldest line data are written, and rearranges the read-out data with a selector 9 for output.
|
