| 摘要 |
A method is described of managing memory in a microprocessor system comprising t wo or more processors (40, 42). Each processor (40, 42) has a cache memory (44, 46) an d the system has a system memory (48) divided into pages subdivided into blocks. The m ethod is concerned with managing the system memory (48) identifying areas thereof as b eing "cacheable", "non-cacheable" or "free". Safeguards are provided to ensure that b locks of system memory (48) cannot be cached by two different processors (40, 42) simulta neously.
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