| 摘要 |
A method for fabricating a load device on an SRAM is provided which substantially increases the effective length of its load device without increasing the cell size. This method includes the steps of: (1) depositing an interpoly dielectric layer on a wafer surface; (2) depositing a first oxide layer on the interpoly dielectric layer; (3) using a photography technique to form at least one first oxide stripe from the interpoly dielectric layer in a direction perpendicular to the direction of the polysilicon load; (4) depositing a second oxide layer on and around the first oxide stripe, then etching back the second oxide layer to form a second oxide spacer on the sidewalls of the first oxide stripe; (5) using a selective etching technique to etch the first oxide stripe, leaving the second oxide spacer on the wafer surface; (6) using a photolithography technique and masked dopant-implantation to form a polysilicon layer on the surface, the polysilicon layer contains a highly doped connector region and an undoped or lightly doped load region. The load region is formed in a direction perpendicular to the second oxide stripe and conformed to the profile of the second oxide stripe so as to assume a three-dimensional heaved structure on top thereof and provide an enhanced effective length.
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