| 摘要 |
PROBLEM TO BE SOLVED: To continuously deposit an intrinsic amorphous silicon layer and a doped amorphous silicon layer on a substrate in the same chemical vapor deposition(CVD) chamber without causing the problem of contamination by a method wherein prior to the deposition of the intrisic amorphous silicon layer on the substrate, a dielectric insulating material layer is deposited on the substrate. SOLUTION: First, a passivation gate dielectric insulating material layer 52 is deposited on a TFT substrate, which is covered with a patterned metal layer, such as an aluminium layer, and is made of glass, but as this layer 52, there are a passivation silicon nitride layer, a gate silicon oxide layer, a composite layer consisting of a gate silicon oxide layer and a gate silicon nitride layer and the like. An intrinsic or undoped amorphous silicon layer 54 is deposited on the gate insulating layer 52 in a thickness of about 200 to about 400 nm. In the following deposition process, a doped amorphous silicon layer 56 of a thickness of about 40 to 60 nm is deposited on the layer 54. The dopant, which is used in this process, is phosphorus. A dopant component, such as antimony, arsenic or boron, is also useful.
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