| 摘要 |
There is provided an error correction decoding apparatus including a first operating unit including a Galois field polynomial operation circuit for obtaining a Galois field polynomial, a second operating unit including a Galois field operation circuit for performing an operation by using the Galois field polynomial, and a program generating unit for generating a control program for the first and second operating units, wherein the first and second operating unit are provided in parallel with each other. Also, there is provided an error correction decoding apparatus including a first operating unit including a Galois field polynomial operation circuit for obtaining a Galois field polynomial and a register circuit used when the Galois field polynomial operation circuit performs an operation, a second operating unit including a Galois field operation circuit for performing an operation by using the Galois field polynomial and a general-purpose operation circuit, a register unit used when the first and second operating unit perform operations, and a program generating unit for generating a control program for the first and second operating unit, wherein the first and second operating units and the register unit are provided in parallel with each other.
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