发明名称 |
Memory-contained processor |
摘要 |
A processor containing a cache memory having its storage capacity enlarged while suppressing area increases is provided. The processor includes an SRAM (Static Random Access Memory) cache memory and a DRAM (Dynamic RAM) cache memory of a large storage capacity. The SRAM cache memory and the DRAM cache memory are coupled to the processor through a processor bus. The SRAM cache memory and the DRAM cache memory transfer data through an internal transfer bus provided separately from the processor bus and having a larger width.
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申请公布号 |
US5983023(A) |
申请公布日期 |
1999.11.09 |
申请号 |
US19970887285 |
申请日期 |
1997.07.02 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MORIWAKI, SHOHEI;YOSHIDA, SHUNICHI;TOYOMOTO, HIDEHARU |
分类号 |
G06F12/08;G06F15/78;G11C11/401;(IPC1-7):G06F15/78 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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