发明名称 |
Algorithmic analogue to digital converter for high speed operation |
摘要 |
The output of a converter stage comprises a digital output and a first analogue residual voltage output. In an overshoot stage, comprising an amplifier (32) and two capacitors (C1,C2), the amplifier produces a second analogue residual voltage output which is indicative of the first analogue residual voltage output. The overshoot stage can be switched between a sampling phase and an amplifying stage. In the scanning phase, the first capacitor is connected to receive the first analogue residual voltage when the voltage is in a first state, and the second capacitor is connected when the voltage is in a second state. Independent claims are included for an analogue to digital (A/D) converter stage, and a method of reducing the overshoot in an algorithmic A/D converter.
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申请公布号 |
DE19924075(A1) |
申请公布日期 |
1999.12.02 |
申请号 |
DE19991024075 |
申请日期 |
1999.05.26 |
申请人 |
NATIONAL SEMICONDUCTOR CORP., SANTA CLARA |
发明人 |
OPRIS, ION E.;CHIN, SING W.;WONG, BILL C.;SAKURAI, SATOSHI |
分类号 |
H03M1/06;H03M1/44;(IPC1-7):H03M1/06;H03M1/38 |
主分类号 |
H03M1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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