发明名称 |
Digitale servobesturingsschakeling. |
摘要 |
A digital servo circuit which comprises a first N-bit counter for counting clock pulses at a recurrence frequency corresponding to error data and a second N-bit counter for counting divided recurrence frequency clock pulses at 1/M times the aforementioned recurrence frequency. The digital servo circuit controls the pull-in operation of a servo system with the count output of the second N-bit counter as control data, while it controls the operation of the servo system in the normal phase-locked state thereof with the count outputs of the first and second N-bit counters as control data with the count output of the second N-bit counter changed according to the amount of external disturbance caused to the servo system. |
申请公布号 |
NL193515(C) |
申请公布日期 |
1999.12.03 |
申请号 |
NL19830002331 |
申请日期 |
1983.06.30 |
申请人 |
SONY CORPORATION (SONY KABUSHIKI KAISHA) |
发明人 |
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分类号 |
H02P23/00;(IPC1-7):H02P7/62;H02P5/00 |
主分类号 |
H02P23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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