| 发明名称 |
PROGRAMMABLE GATE |
| 摘要 |
FIELD: computer engineering, in particular, calculation of Boolean functions for failure-resistant systems. SUBSTANCE: goal of invention is achieved by introduced two-cycle calculation of logical functions using disjunction of results output by two intermediate functions. Device decreases time required for repeated programming and uses gates implementing Turing function. The gates keeps their functional completeness for single persistent errors at their inputs. EFFECT: increased speed of calculation upon failures, simplified diagnostics of calculation of Boolean functions. 2 cl, 4 dwg
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| 申请公布号 |
RU2146840(C1) |
申请公布日期 |
2000.03.20 |
| 申请号 |
RU19970116904 |
申请日期 |
1997.10.01 |
| 申请人 |
TJURIN SERGEJ FEOFENTOVICH;NESMELOV VLADIMIR ARKAD'EVICH;BELJAKOV ANDREJ JUR'EVICH;KHARITONOV VALERIJ ALEKSEEVICH;POTAPOV IVAN MIKHAJLOVICH;ZARUBSKIJ VLADIMIR GEORGIEVICH;MISHKIN SERGEJ VLADIMIROVICH;GREVTSEV ALEKSANDR MIKHAJLOVICH;ZAINCHKOVSKIJ ANDREJ ALEKSANDROVICH;SABIRZHANOV RUSLAN AL'BERTOVICH;DEMENTEEV PAVEL VALER'EVICH;BOCHAROV ALEKSEJ EVGEN'EVICH |
发明人 |
TJURIN S.F.;NESMELOV V.A.;BELJAKOV A.JU.;KHARITONOV V.A.;POTAPOV I.M.;ZARUBSKIJ V.G.;MISHKIN S.V.;GREVTSEV A.M.;ZAINCHKOVSKIJ A.A.;SABIRZHANOV R.A.;DEMENTEEV P.V.;BOCHAROV A.E. |
| 分类号 |
G06F7/57;G06F7/00;G06F11/277;G11C17/00;(IPC1-7):G11C17/00 |
主分类号 |
G06F7/57 |
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