发明名称 FLIPFLOP CIRCUIT HAVING CLOCK SIGNAL CONTROL FUNCTION AND CLOCK CONTROL CIRCUIT
摘要 PURPOSE: A flipflop circuit having a clock signal control function and a clock control circuit is provided to improve a power consumption necessary for a clock signal supply by outputting a low level signal and a short pulse as an internal clock signal in a data holding output circuit. CONSTITUTION: The flipflop circuit having a clock signal control function and a clock control circuit comprises: a data holding output circuit for receiving a data input signal and an internal clock signal and holding and outputting the data output signal value by being synchronized to the internal clock signal; an inconsistent detection circuit(DCC) for receiving the data input signal of the data holding output circuit and the data output signal, detecting an inconsistency of the data input signal and the data output signal, and outputting an inconsistent detection signal; and a clock control circuit(CCC) for receiving an external clock signal and the inconsistent input signal, outputting a short pulse as the internal signal by being synchronized to an ascent of the external clock signal when the data input signal is inconsistent to the data output signal, and outputting a low level signal as the internal signal when the data input signal is consistent to the data output signal.
申请公布号 KR20000017511(A) 申请公布日期 2000.03.25
申请号 KR19990035329 申请日期 1999.08.25
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HAMADA MOTOTSKU;KURODA TADAHIRO
分类号 H03K3/356;H03K3/012;H03K3/037;(IPC1-7):H03K3/356 主分类号 H03K3/356
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