发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To surely prevent the occurrence of a short circuit between a gate electrode and upper-layer wiring. SOLUTION: At forming of a contact hole, a BPSG film which becomes an interlayer insulating film is formed after a sacrificial film, namely a silicon nitride film 7, which can secure the etching selection ratio with respect to silicon oxide films 4, 5, and 6 is formed on the upper surface of a sample, and then the occurrence of a short circuit between a gate electrode and upper-layer wiring is surely prevented by removing the BPSG film through flattening. In conventional examples, a state occurs such that even the silicon oxide films which protect the gate electrode is etched off at etching of the BPSG film, because the etching selection ratio with respect to the silicon oxide films is hard to be secured, and consequently, short circuit between the gate electrode and upper-layer wiring is likely to occur. However, since the sacrificial film is interposed between the BPSG film and silicon oxide films, the occurrence of the overetching can be prevented.
申请公布号 JP2000216242(A) 申请公布日期 2000.08.04
申请号 JP19990012119 申请日期 1999.01.20
申请人 NEC CORP 发明人 HARASHIMA KEIICHI
分类号 H01L21/302;H01L21/3065;H01L21/3205;H01L21/768;(IPC1-7):H01L21/768;H01L21/306;H01L21/320 主分类号 H01L21/302
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