发明名称 PSK SIGNAL RECEIVER
摘要 PROBLEM TO BE SOLVED: To process an input signal at high speed with a simple configuration by obtaining data on a phase error and a soft judgment gain by means of referring to a memory table with the common mode and orthogonal signal values of demodulator outputs as addresses. SOLUTION: A received modulation signal is distributed to common mode and orthogonal signals whose phases are shifted by 90 degrees in an orthogonal demodulator 1. They are inputted to an A/D converter 2 and are converted into digital signals. The phases of the common mode and orthogonal signals, which are converted into the digital signals by the A/D converter 2, are rotated in accordance with output from a phase controlled variable calculator 7 in a phase controller 3. Then, they are outputted to a memory table 6 and a soft judgment gain data adder 4. Namely, output from the phase controller 3 is inputted to the memory table 6 and an error value which is previously stored in the memory table 6 is read with the common mode signal value and an orthogonal signal value as addresses. Then, the phase error value which is read is outputted to a low pass filter 8. Thus, two operation processings are obtained only by once referring to the memory table.
申请公布号 JP2000216840(A) 申请公布日期 2000.08.04
申请号 JP19990015961 申请日期 1999.01.25
申请人 JAPAN RADIO CO LTD 发明人 SENOO SHIGERU
分类号 H03D13/00;H04L27/22;(IPC1-7):H04L27/22 主分类号 H03D13/00
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