发明名称 SEMICONDUCTOR DEVICE PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a package for semiconductor device superior in coplanarity. SOLUTION: A substrate 12, where with a required wiring pattern 13 formed, a semiconductor chip housing hole 15 penetrates in the thickness direction, a heat sink 18 fixed with an adhesive layer to the substrate 12 while covering an opening part of the semiconductor chip housing hole 15 which is opened on a surface opposite to the mounting surface of the substrate 12, and a solder resist layer 19 covering the mounting surface of substrate 12 while a land part where an external connection terminal of a wiring pattern 13a formed on the mounting surface of substrate 12 is formed is exposed, are provided to a semiconductor device package 30. Here, the solder resist layer 19 is formed of a photosensitized resist and a resin layer 32 of resin, whose thermal expansion coefficient which is smaller than the solder resist layer 19 is formed so as to cover the solder resist layer 19.
申请公布号 JP2000216304(A) 申请公布日期 2000.08.04
申请号 JP19990012362 申请日期 1999.01.20
申请人 SHINKO ELECTRIC IND CO LTD 发明人 NAGATA KINJI;KASAI MAKOTO
分类号 H01L23/12;H01L23/14;H01L23/34;(IPC1-7):H01L23/34 主分类号 H01L23/12
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