| 摘要 |
PROBLEM TO BE SOLVED: To provide a SRAM in which both of noise resistance and circuit integration can be improved. SOLUTION: Memory cells MC11-MC1n and memory cells MC21-MC2n are arranged so as to be adjacent respectively, and bit lines BL1, dummy bit lines DBL, bit lines BL2 are wired in an adjacent state between them. Thus, element area can be reduced by sharing the dummy bit lines DBL between adjacent memory cells. as the dummy bit lines DBL and the bit lines BL2 are capacitively coupled and affected mutually by a noise, margin for a noise is made high.
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