发明名称 Multichip module packaging process for known good die burn-in
摘要 A method of packaging and testing integrated circuit dies includes coupling a first integrated circuit (52) to the substrate (54); encapsulating (56) the first integrated circuit (52); and then testing (58) the first integrated circuit. If testing is successful, a second integrated circuit (60) is coupled to the substrate (54). In addition, the method may include encapsulating (74) the second integrated circuit (60) so that the first and second integrated circuits (52, 60) are part of a single monolithic module, such as a multichip module (78). The second integrated circuit ( 60) may also be tested after encapsulation (74). The present invention may also be practiced by encapsulating and testing lesser value die before encapsulating higher value die. This reduces the chance that a higher value die will be rendered unusable because one of the lower value dies attached to the substrate is subsequently found defective after the higher value die has been encapsulated and/or tested. <IMAGE>
申请公布号 EP1081757(A1) 申请公布日期 2001.03.07
申请号 EP20000118199 申请日期 2000.08.31
申请人 S3 INCORPORATED 发明人 YOUNG I. KWON
分类号 H01L23/31;H01L25/18;H01L21/66;H01L23/00;H01L23/544;H01L25/04 主分类号 H01L23/31
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