发明名称 VITERBI DETECTOR, SIGNAL PROCESSING CIRCUIT, RECORDING AND REPRODUCING DEVICE AND INFORMATION PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To reduce power consumption. SOLUTION: In the case that likelihood calculation is executed on the basis of the Viterbi algorithm, a decoded value series is estimated and they are stored in path memories (630-633), a convergence discriminator (660) discriminates whether an alive path is converged on the basis of the values stored in each stage of the path memories (630-633). When the discriminator (660) discriminates that the alive path has converged, the discriminator (660) stops the operation of the path memories (630-633) that store information prior to the point of time of convergence except one path memory (630) that is selected optionally (but fixedly). Then the discriminator (660) outputs the output of the path memory (630) whose operation has not been stopped as a decoding result. Since the operation of the path memories whose alive path has converged is stopped, the power consumption can be reduced.
申请公布号 JP2001144633(A) 申请公布日期 2001.05.25
申请号 JP19990325364 申请日期 1999.11.16
申请人 HITACHI LTD 发明人 HIRAI TATSUYA;NISHITANI TAKUJI;YAMAKAWA HIDEYUKI;NARA TAKASHI;IDE HIROSHI
分类号 G06F11/10;G11B20/10;G11B20/18;H03M13/41;(IPC1-7):H03M13/41 主分类号 G06F11/10
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