PROCESS FOR PLANARIZATION AND RECESS ETCHING OF POLYSILICON IN AN OVERFILLED TRENCH

摘要

The invention is directed to a process for forming a recess in at least one poly silicon overfilled trench in an integrated circuit, comprising the following steps: uniformly etching the poly silicon overfill layer (4); stopping the etching before the poly silicon layer (4) is completely removed from the surface of the integrated circuit; and recess etching the polysilicon layer (4) with microtrenching properties for forming a substantially planar recess (6) near the top of the at least one trench (3).