| 摘要 |
PURPOSE: A method for adopting a scan-BIST architecture for low power operation is provided to achieve a low power operation, without inserting a blocking circuit of magnetic paths and without reducing a scan clock rate increasing a test time. CONSTITUTION: According to a process for adopting a synthesized scan-BIST architecture to a low power operation, a scan path of the scan-BIST architecture is divided into a number of individual scan path sections having a scan input and a scan output respectively. And a connection is formed between the scan inputs of each scan path sections, and a connection is formed between the scan outputs of each scan path sections. And a scan control circuit(110) having an individual scan control output is provided, and an individual connection is formed between each individual control output and one of the scan path sections. |
