| 摘要 |
PROBLEM TO BE SOLVED: To provide a matrix switch circuit with a plurality of inputs and a plurality of outputs that controls a phase of output data with respect to input data without increasing the circuit scale in the case of outputting data of an optional pattern other than that of the input data. SOLUTION: A multiplexer 3 multiplexes input data of input interfaces 1, 2 and data outputted from an optional pattern generating circuit 13, its output is written in a 1st port of a data memory 4, is read according to a read address of a 2nd port supplied from a control memory 10, and an output of the data memory 4 is given to a demultiplexer 5, which selects an output destination to provide its output to output interfaces 6, 7. The read sequence of the data is converted according to the read address of the control memory 10. Furthermore, write and read timing to/from the data memory 4 can be independently controlled with a load signal to a write counter 8 and a read counter 9 so as to adjust the phase of frames. |
