| 摘要 |
An analog-to-digital converter (200) has a first stage (207) to integrate and quantize the difference between a feedback signal (R) and an input signal (X) to a first intermediate signal (Y1) with a first resolution (M1), a second stage (208) to integrate and quantize the first intermediate signal (Y1) to a second intermediate signal (Y2) with a second, lower resolution (M2), a feedback stage (260) to convert the second intermediate signal (Y2) to the feedback signal (R), and a third stage (206, 270, 280, 285) to differentiate the first intermediate signal (Y1) to a third intermediate signal (W1), to delay the second intermediate signal (Y2) to a fourth intermediate signal (W2), and to add the third and fourth intermediate signals (W1, W2) to an output signal (Y) having a resolution that results from the sum of the first (M1) and second (M2) resolutions.
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