发明名称 BUS CONVERTING DEVICE
摘要 PROBLEM TO BE SOLVED: To make efficiently executable memory read from each of input/output devices even in a case where a hierarchical structure bus system is adopted and a large scale input/output device is used. SOLUTION: In the bus converting device 7 having a buffer control part 71 with pre-read function in four-side configuration, port storage registers 730-733 are compared with an input/output device number 723 by comparators 734-737 and when they are mutually coincident, a matched buffer side is used by hit decision logic 721 but when they are not mutually coincident, the oldest buffer side is used by LRU decision logic 722. Thus, even in a bus system having a large scale input/output device, the bus converting device of optimal gate scale can be provided, the input/output device of high data buffer use frequency continuously occupies a data buffer and there is an effect that a pre-read control function can be effectively utilized.
申请公布号 JP2002073532(A) 申请公布日期 2002.03.12
申请号 JP20000271487 申请日期 2000.09.04
申请人 HITACHI LTD 发明人 HIRAMATSU MASATAKA
分类号 G06F13/36;(IPC1-7):G06F13/36 主分类号 G06F13/36
代理机构 代理人
主权项
地址