METHOD FOR FORMING DUAL DAMASCENE PATTERN OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A formation method of a dual damascene pattern of semiconductor devices is provided to simplify manufacturing processes and to reduce manufacturing cost and time by simultaneously forming a dual damascene pattern. CONSTITUTION: An interlayer dielectric(2) and a first resist(3) are sequentially formed on a semiconductor substrate(1). A defined region of the interlayer dielectric(2) is exposed by patterning the first resist(3) and a resist oxide(3a) is then formed on the sides and upper surface of the first resist(3) using a plasma processing. A second resist(4) is formed on the entire surface of the resultant structure. The second resist(4) is patterned to expose the first resist(3) and the interlayer dielectric(2). Then, a contact hole(5a) is formed to expose the semiconductor substrate(1) by etching the exposed first resist(3) and interlayer dielectric(2). A dual damascene pattern made of the contact hole(5a) and a trench is formed by continuously etching the exposed interlayer dielectric(2) using the second resist(4) as an etch mask. A metal interconnection is filled into the dual damascene pattern.