发明名称 CLOCK TRANSMITTING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a clock transmitting circuit which is prevented from malfunctioning by adjusting the duty ratio of its output clock. SOLUTION: Constant-current sources 12- 1 and 12- 2 which are variable in current value under control are arranged between both a power source Vdd and the ground GND, and an inverter 11; and a clock IN is inputted to the inverter 11 and a reference voltage Vref is inputted to an operational amplifier 13d of a duty ratio adjusting circuit 13, which controls the current values of the constant current sources 12- 1 and 12- 2 so that the output clock OUT of the inverter 11 has a duty ratio corresponding to the reference voltage Vref.
申请公布号 JP2002252557(A) 申请公布日期 2002.09.06
申请号 JP20010048358 申请日期 2001.02.23
申请人 KAWASAKI MICROELECTRONICS KK 发明人 KOTAKI KOICHI
分类号 H03K19/096;(IPC1-7):H03K19/096 主分类号 H03K19/096
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