| 摘要 |
PROBLEM TO BE SOLVED: To back a bit line, a control gate, and a word gate with a metal line of low resistance while maintaining a minimum metal wiring pitch. SOLUTION: A special array end structure and a method for manufacturing the same provided by the present invention allow most effectively backing three resistance layers including a diffusion bit line, a control gate, and a word gate polycrystalline silicon (here the control gate polycrystalline silicon may overlap on the diffusion bit line), using only a metal line of three layers while maintaining a minimum metal wiring pitch. Furthermore, the backing method can incorporate a bit diffusion selection transistor and/or a control gate line selection transistor. It is an object of the selection transistor to reduce total capacitance of the bit line or control gate line, or to reduce disturbing conditions to which a sub array in which cells are grouped may be subjected during programming and/or deleting. |
