| 摘要 |
PROBLEM TO BE SOLVED: To solve the judgment error of logic value (first problem) resulted from the rise and trailing time difference of logic value of a subject signal for judgment and the stored logic value error (second problem) resulted from the setup time difference of logic value in a logic value storing means. SOLUTION: In a storage circuit 701, the logic value of a subject signal HCMP for judgment is stored in FF 201 and 203 by judgment edges LH and HL generated every odd-number time of a judgment edge EH, and the logic value of a signal HCMP' for delay judgment is stored in FF 202 and 204 by judgment edges LH and HL. In a selection signal generating circuit 301, a selector 302 selects either one of FF 201 and 203 according to a selection signal y generated on the basis of the output of FF 202 and 204. A storage circuit 702 is similarly operated every even number time of the judgment edge EH, and a selector 303 alternately selects the storage circuits 701 and 702. FF 201-204 of the storage circuit 701 are reset by a judgment edge LH' in the storage circuit 702, and FF 201'-204' of the storage circuit 702 are reset by the judgment edge HL in the storage circuit 701.
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