发明名称 |
Method for tuning a VCO using a phase lock loop |
摘要 |
A very fast lock integer N PLL with hybrid digital coarse VCO tuning and VCO temperature drift compensation provides for a fully digital tuning scheme without the need for charge pumps. A PLL synthesizer (300) using such a PLL design provides for very fast lock times by using an open loop step and a closed loop step. The hybrid PLL can achieve coarse tuning within four clock cycles, while minimizing any errors caused by the VCO non-linearity. Temperature tracking and compensation is also provided. A SAR implementation (100) and an interpolation tuning implementation (200) are also described.
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申请公布号 |
US6545547(B2) |
申请公布日期 |
2003.04.08 |
申请号 |
US20010929677 |
申请日期 |
2001.08.13 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
FRIDI AHMED REDA;BELLAOUAR ABDELLATIF;EMBABI SHERIF |
分类号 |
H03L7/099;H03L7/10;H03L7/18;H03L7/181;H03L7/183;H03L7/187;H03L7/199;H04L7/033;(IPC1-7):H03L7/00 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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