| 摘要 |
PURPOSE: A bit line sense structure of a semiconductor memory device is provided to reduce power consumption by reducing an overdrive section of a bit line sense amplifier driver. CONSTITUTION: A level shifter(10) is used for generating the second signal according to the first signal. A bit line sense amplifier controller(20) is used for comparing the second signal of the level shifter and the first output of a sense amplifier driver(30) in order to generate the third signal, and generating the fourth and the fifth signals according to the second signal and a bit line synchronization signal. The sense amplifier driver generates the first and the second outputs according to the bit line synchronization signal, the third, the fourth, and the fifth signals. A bit line sense amplifier(40) is used for performing sensing operations according to the first and the second outputs.
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