发明名称 COLOR SUB-CARRIER MULTI-PHASE CLOCK GENERATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve the problem that reduction of a phase shift amount involves unavoidable generation of high frequency noise. SOLUTION: The system includes a voltage generation means for generating first to N-th voltage signals having sampled voltage values obtained as a result of sampling first to N-th clocks of a color sub-carrier clock having phases shifted each by a predetermined angleα°for each period prescribed by frequencies corresponding to N times (N being an integer of 2 or more) the color sub-carrier clock, and a clock generation means, in response to the first to N-th voltage signals, for generating first to N-th color sub-carrier signals having phases shifted each by the predetermined angleα°and having frequencies of the color sub-carrier clocks as color sub-carrier multi-phase clocks. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003219434(A) 申请公布日期 2003.07.31
申请号 JP20020011822 申请日期 2002.01.21
申请人 MITSUBISHI ELECTRIC CORP;RENESAS LSI DESIGN CORP 发明人 NOMURA KAZUHISA
分类号 H04N9/45;(IPC1-7):H04N9/45 主分类号 H04N9/45
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