| 摘要 |
A machine used for conversion of digital number values to analog signal values. In one embodiment, a counter tracks the elapsed time since the beginning of a conversion cycle. Simultaneously, a reference analog signal such as a voltage ramp is generated. When the count provided by the counter reaches a stored digital number value, a sample-and-hold circuit is triggered and acquires the value of the reference analog signal. A multiplicity of stored digital number values can be converted by using a multiplicity of sample-and-hold and trigger circuits. The conversion operations can share the counter and the reference analog signal. The invention can be used to implement massively parallel digital-to-analog conversion. Parallel digital-to-analog conversion is useful in many applications such as digital communications, image display, and shared parallel analog-to-digital conversion where it is desired to convert multiple digital numbers to analog signals.
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