INPUT BUFFER CIRCUIT PROVIDED WITH SMALL CONSUMPTION POWER AND RAPID RESPONSE SPEED

摘要

PURPOSE: An input buffer circuit provided with a small consumption power and a rapid response speed is provided to enable the high speed buffer block at the normal operational mode requiring the high speed response and to enable the low power buffer block at the power down mode requiring the low power. CONSTITUTION: An input buffer circuit provided with a small consumption power and a rapid response speed includes a high speed buffer block(100), a low power buffer block(200) and a control block(300). The high speed buffer block(100) is enabled at the first operation mode of the synchronous semiconductor memory device to buffer the mode control signal(XCKE) inputted from the external system. That is, the mode control signal(XCKE) inputted from the external system is buffered by the high speed buffer block(100) when the synchronous semiconductor memory device is changed from the first operational mode to the second operational mode. And, the mode control signal(XCKE) buffered by the high speed buffer block(100) is supplied to the control block(300) as the high speed buffering signal(PCKE).