发明名称 RESET PULSE GENERATION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To generate a stable reset pulse independent of a source voltage. SOLUTION: By providing a detection circuit (210) for detecting the rise of a source voltage of a logic circuit having a battery as an operation power source, a latch circuit (220) capable of holding the output signal of the detection circuit, and a terminal (CLR) for intaking a signal capable of clearing the held condition of the latch circuit, the threshold of the detection circuit is determined by the output voltage of the battery. Thereby limitation on the rise time of a source VCC on the high voltage side is eliminated and a satisfactory power-on-reset signal is obtained. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003283316(A) 申请公布日期 2003.10.03
申请号 JP20020085036 申请日期 2002.03.26
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD;RENASAS NORTHERN JAPAN SEMICONDUCTOR INC 发明人 ENDO SHUICHI;IMAIZUMI YOSHIFUMI
分类号 H03K17/22;(IPC1-7):H03K17/22 主分类号 H03K17/22
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