| 摘要 |
The invention relates to a process for fabricating a semiconductor ridge pin junction (20, 21). According to the invention, judicious choices are made when defining hard masks and the sequence in which resist masks are formed for implantation (doping) and etching, which choices enable the conventional photolithography technique to be used despite the low precision of mask alignment (±100 nm) relative to underlying regions. By virtue of the process according to the invention, a ridge pin junction is formed, at lower cost and with shorter production times than in the prior art, with doped regions precisely spaced apart from the edge of the ridge. |
