发明名称 Printed circuit board debug technique
摘要 A computer-aided design (CAD) tool is used to create a preliminary design of a mulit-layered printed circuit board, comprising a layout of electrical components on a main region of a printed circuit board and a routing of signal traces among the lectical components within the main region. An extended region is then added to the design on the CAD tool that comprises a layout of selected debug connectors on the extended region and at least one additional signal layer. Traces connecting the debug connectors to selected vias of the main region of the printed circuit board are then routed on the added signal layer only. A prototype board is then created and tested. Once testing is complete, the extended region and the at least one additional layer are removed from the design in the CAD tool without disturbing the layout of components and routing of signal traces on the main region of the printed circuit board.
申请公布号 US6787708(B1) 申请公布日期 2004.09.07
申请号 US20000717451 申请日期 2000.11.21
申请人 UNISYS CORPORATION 发明人 JOCHYM DANIEL A.;WITTE JAMES C.;BRADLEY MICHAEL JOHN
分类号 G01R31/28;G06F17/50;H05K1/02;H05K3/00;(IPC1-7):H05K1/16 主分类号 G01R31/28
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