Printed Wiring Board

摘要

A printed wiring board used to suppress parasitic component is provided. The printed wiring board 100 includes a multi-layer substrate 110, and a power line 50 laid on the multi-layer substrate 110 and connected with a power terminal row T11a-T11d of a semiconductor device 10. The power line 50 includes a first wiring pattern 51 formed on a surface of the multi-layer substrate 110, a second wiring pattern 52 formed within the multi-layer substrate 110, and interlayer connections 53x and 53y electrically conducting the first wiring pattern 51 and the second wiring pattern 52 to bypass at least a portion of the power terminal row T11a-T11d.

主权项

1. A printed wiring board, comprising:
a multi-layer substrate; a power line, laid on the multi-layer substrate and connected with a power terminal row of a semiconductor device; and a ground line, laid on the multi-layer substrate and connected with a ground terminal row of the semiconductor device; wherein, at least one of the power line and the ground line comprises: a first wiring pattern, formed on a surface of the multi-layer substrate; a second wiring pattern, formed within the multi-layer substrate; and an interlayer connection, electrically conducting the first wiring pattern and the second wiring pattern to bypass at least a portion of the power terminal row or the ground terminal row.