MEMORY CELL UNIT, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING IT AND DRIVING METHOD OF MEMORY CELL ARRAY

摘要

PROBLEM TO BE SOLVED: To provide a driving method of a memory cell unit having a structure which secures an enough breakdown voltage of a selecting transistor at a source side for avoiding the generation of false write to a memory cell, or a memory cell array which can avoid false write even if the breakdown voltage of a selecting transistor is lower than a write blocking voltage.

SOLUTION: The memory cell unit has a semiconductor substrate wherein a source diffusion layer which is a high concentration impurity diffusion layer is formed in at least a part of a surface, a pillar-like semiconductor layer which is formed in a vertical direction on the semiconductor substrate has a drain diffusion layer in an uppermost part and a first impurity diffusion layer of a low concentration all over a bottom surface, a memory cell array wherein a plurality of memory cells with a charge storage layer and a control gate are formed on the side wall of the pillar-like semiconductor layer and they are connected to the substrate in series in a vertical direction, a second impurity diffusion layer formed at the lower end of the memory cell array and a selecting transistor which has a gate electrode around the side wall of the pillar-like semiconductor layer and connects the second impurity diffusion layer and the first impurity diffusion layer. The first impurity diffusion layer is extended to a part of the channel region of the pillar-like semiconductor layer side wall part facing a gate electrode of the selecting transistor.

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