发明名称 NONVOLATILE MEMORY CELL AND OPERATING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a nonvolatile memory device with a two-bit cell structure, which has enhanced programming efficiency and a reduced size and is produced at lower costs. <P>SOLUTION: One embodiment provides a system having a nonvolatile memory comprising a p-type semiconductor substrate, an oxide layer on the p-type semiconductor substrate, a nitride layer on the oxide layer, an additional oxide layer on the nitride layer, a gate on the additional oxide layer, two n<SP>+</SP>junctions in the p-type semiconductor substrate, a source and a drain respectively formed in the two n<SP>+</SP>junctions, a first bit and a second bit in the nonvolatile memory, and the nonvolatile memory comprising at least two operation states (that is, erase and program). That is, one bit in the nonvolatile memory can be either in the erase state or the program state. To erase one bit, electrons are injected into the gate of the nonvolatile memory. To program one bit, electron holes are injected or electrons are reduced for that bit. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005203739(A) 申请公布日期 2005.07.28
申请号 JP20040322412 申请日期 2004.11.05
申请人 MACRONIX INTERNATL CO LTD 发明人 CHIH-CHIEH YEH;CHEN HUNG-YUEH;LI-YING LIAO;TSAI WEN-JER;TAO-CHENG LU
分类号 G11C16/02;G11C16/04;G11C16/06;H01L21/28;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 G11C16/02
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