发明名称 |
FERROELECTRIC RANDOM-ACCESS MEMORY WITH PRE-PATTERNED OXYGEN BARRIER |
摘要 |
Structure of F-RAM cells are described. The F-RAM cell include a contact extending through a first dielectric layer on a surface of a substrate. A barrier structure is formed over the contact by depositing and patterning a barrier layer. A second dielectric layer is deposited over the patterned barrier layer and planarized to expose a top surface of the barrier structure. A ferro-stack is deposited and patterned over the barrier structure to form a ferroelectric capacitor. A bottom electrode of the ferroelectric capacitor is electrically coupled to the diffusion region of the MOS transistor through the barrier structure. The barrier layer is conductive so that a bottom electrode of the ferroelectric capacitor is electrically coupled to the contact through the barrier structure. In one embodiment, patterning barrier layer comprises concurrently forming a local interconnect (LI) on a top surface of the first dielectric layer. |
申请公布号 |
US2016351577(A1) |
申请公布日期 |
2016.12.01 |
申请号 |
US201514970063 |
申请日期 |
2015.12.15 |
申请人 |
Cypress Semiconductor Corporation |
发明人 |
Sun Shan |
分类号 |
H01L27/115;H01L49/02 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device, comprising:
a barrier layer disposed over a contact and a first dielectric, the barrier layer comprising a pre-patterned barrier structure that is electrically conductive, wherein the pre-patterned barrier structure is formed by a first patterning, disposed over the contact and includes a first length; and a patterned ferro-stack including a second length disposed at least partially over the pre-patterned barrier structure, wherein the patterned ferro-stack is formed by a second patterning and coupled electrically to the contact via the pre-patterned barrier structure, wherein the first patterning of the pre-patterned barrier structure and the second patterning of the patterned ferro-stack are performed separately. |
地址 |
San Jose CA US |