发明名称 INTEGRATED CIRCUITS WITH OVERLAY MARKS AND METHODS OF MANUFACTURING THE SAME
摘要 Integrated circuits and methods for manufacturing the same are provided. An integrated circuit includes a base dielectric layer, a first dielectric layer overlying the base dielectric layer, and a second dielectric layer overlying the first dielectric layer. A first overlay mark is positioned within the first dielectric layer, and a second overlay mark is positioned within the second dielectric layer, where the second overlay mark is offset from the first overlay mark. First and second blocks are positioned within the base dielectric layer, where the first overlay mark directly overlays the first block and the second overlay mark directly overlays the second block.
申请公布号 US2016351507(A1) 申请公布日期 2016.12.01
申请号 US201514721121 申请日期 2015.05.26
申请人 GLOBALFOUNDRIES Singapore Pte. Ltd. 发明人 Wang Shijie;Fu Yong Feng;Leong Siew Yong;Wang Lei;See Alex
分类号 H01L23/544;H01L21/3105 主分类号 H01L23/544
代理机构 代理人
主权项 1. An integrated circuit comprising: a base dielectric layer; a first dielectric layer overlying the base dielectric layer; a second dielectric layer overlying the first dielectric layer; a first overlay mark pattern positioned within the first dielectric layer; a second overlay mark pattern positioned within the second dielectric layer, wherein the second overlay mark pattern is offset from the first overlay mark pattern; and a first block and a second block positioned within the base dielectric layer, wherein the first overlay mark pattern directly overlays the first block, and wherein the second overlay mark pattern directly overlays the second block, wherein the first block comprises a first block upper surface that is dished with a curved area, and wherein the curved area of the first block upper surface is symmetric with the first overlay mark pattern.
地址 Singapore SG