Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs

摘要

A method for semiconductor fabrication includes providing channel regions on a substrate including at least one Silicon Germanium (SiGe) channel region, the substrate including a plurality of regions including a first region and a second region. Gate structures are formed for a first n-type field effect transistor (NFET) and a first p-type field effect transistor (PFET) in the first region and a second NFET and a second PFET in the second region, the gate structure for the first PFET being formed on the SiGe channel region. The gate structure for the first NFET includes a gate material having a first work function and the gate structures for the first PFET, second NFET and second PFET include a gate material having a second work function such that multi-threshold voltage devices are provided.

主权项

1. A semiconductor device, comprising:
a substrate having a plurality of regions including a first region and a second region; channel regions formed on the substrate including at least one Silicon Germanium (SiGe) channel region; and gate structures for a first n-type field effect transistor (NFET) and a first p-type field effect transistor (PFET) in the first region and a second NFET and a second PFET in the second region, the gate structure for the first PFET being formed on the SiGe channel region, wherein the gate structure for the first NFET includes a gate electrode material having a first work function having a quartergap work function and comprising at least titanium and nitrogen, and the gate structures for the first PFET, second NFET and second PFET include a gate electrode material including an aluminum containing layer atop a layer comprising at least titanium and nitrogen, the gate material having a second work function having a midgap work function such that multi-threshold voltage devices are provided, wherein the gate electrode material having the first work function is not present in the gate structures for the first PFET, second NFET and second PFET, and the gate electrode material having the second work function is not present in the gate structure for the first NFET.