发明名称 METHOD OF MANUFACTURING A MULTI-LAYER SEMICONDUCTOR DEVICE
摘要 1312510 Semi-conductor devices HITACHI Ltd 26 June 1970 [27 June 1969] 31120/70 Heading H1K In making a voltage variable capacitance diode an N + NN + configuration is achieved by forming a P type layer on an N+ substrate, forming an N + layer on top of it and heating to convert the P layer to N type by donor diffusion from the N + layer and substrate. In a typical case the substrate is of antimony-doped silicon of #À02 ohm. cm. resistivity, the P type layer, epitaxially grown by thermal decomposition of a silane is 1-5 Á thick and has a resistivity of À5-3 ohm. cm. due to boron doping, and the N+ overlayer, formed by epitaxy or diffusion, is 1-3 Á thick and is doped with phosphorus or antimony to a resistivity of À6 to À001 ohm. cm. Heating for a specified period at 1200‹ C. causes conversion of the P type layer. A P + layer is next produced by a specified epitaxial growth or diffusion technique, and the resulting product mesa-etched, passivated with lead silicate glass or silicon oxide optionally mixed with nitride, and contacted. Both the top contact, of gold or gold-gallium and the substrate contact of gold-antimony are given an overlayer of silver. In a modified method conversion of the P type layer occurs during deposition of the N + and/or P + layer or alternatively during formation of the N + layer by a diffusion method. Manufacture of a planar diode uses the same steps save that the N + and P + layers are formed by a masked diffusion so that the mesa-etching and subsequent re-passivation can be dispensed with.
申请公布号 GB1312510(A) 申请公布日期 1973.04.04
申请号 GB19700031120 申请日期 1970.06.26
申请人 HITACHI LTD 发明人
分类号 H01L29/93;(IPC1-7):H01L9/00 主分类号 H01L29/93
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