Method and apparatus for forming an integrated circuit with a metalized resistor in a standard cell configuration

摘要

An integrated circuit includes a layer of a semiconductor device including a standard cell configuration having a fixed gate electrode pitch between gate electrode lines and a resistor formed of metal between the fixed gate electrode pitch of the standard cell configuration. In one embodiment, the integrated circuit can be charged device model (CDM) electrostatic discharge (ESD) protection circuit for a cross domain standard cell having the resistor formed of metal. A method of manufacturing integrated circuits includes forming a plurality of gate electrode lines separated by a gate electrode pitch to form a core standard cell device, applying at least a first layer of metal within the gate electrode pitch to form a portion of a resistor, and applying at least a second layer of metal to couple to the first layer of metal to form another portion of the resistor.

主权项

1. A method of manufacturing integrated circuits, the method comprising:
forming a plurality of gate electrode lines separated by a gate electrode pitch to form a standard cell device; applying at least a first layer of metal between adjacent gate electrode lines to form a portion of a resistor; and applying at least a second layer of metal to directly couple to the first layer of metal to form another portion of the resistor.