发明名称 |
Semiconductor packages and methods of fabricating the same |
摘要 |
A semiconductor package including a lower package and an upper package provided may be provided. The lower package includes a lower package substrate, a lower semiconductor chip mounted thereon, and a lower mold layer provided on the lower package substrate. The upper package includes an upper package substrate and an upper semiconductor chip thereon. The lower mold layer includes a guide portion extending along a vertical direction from an edge of the lower package substrate toward the upper package. |
申请公布号 |
US9478523(B2) |
申请公布日期 |
2016.10.25 |
申请号 |
US201514795171 |
申请日期 |
2015.07.09 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Lee Kang Joon |
分类号 |
H01L23/34;H01L25/065;H01L23/13;H01L23/544;H01L23/373;H01L23/31;H01L21/52;H01L21/56;H01L21/48;H01L25/00 |
主分类号 |
H01L23/34 |
代理机构 |
Harness, Dickey & Pierce, P.L.C. |
代理人 |
Harness, Dickey & Pierce, P.L.C. |
主权项 |
1. A semiconductor package, comprising:
a lower package including a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower mold layer on the lower package substrate; and an upper package on the lower package, the upper package including an upper package substrate and an upper semiconductor chip thereon, wherein the lower mold layer comprises a guide portion extending vertically from an edge of the lower package, the guide portion defining a space in which the upper package is within the guide portion, and wherein the guide portion includes a first portion having a uniform width in the vertical direction and a second portion protruding from the first portion, the second portion having a width gradually decreasing in the vertical direction. |
地址 |
Gyeonggi-Do KR |