发明名称 Package including a semiconductor die and a capacitive component
摘要 In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
申请公布号 US9478519(B2) 申请公布日期 2016.10.25
申请号 US201514927871 申请日期 2015.10.30
申请人 Fairchild Semiconductor Corporation 发明人 Ashrafzadeh Ahmad R.;Ullal Vijay G.;Chiang Justin;Kinzer Daniel;Dube Michael M.;Jeon Oseob;Wu Chung-Lin;Estacio Maria Cristina
分类号 H01L29/00;H01L25/065;H01L23/31;H01L23/538;H01L23/00;H01L25/16;H01L23/14;H01L23/15 主分类号 H01L29/00
代理机构 Brake Hughes Bellemann LLP 代理人 Brake Hughes Bellemann LLP
主权项 1. An apparatus, comprising: a first molding layer; a second molding layer; a substrate disposed between the first molding layer and the second molding layer; a first capacitive plate disposed in the first molding layer on a first side of the substrate; a second capacitive plate disposed in the second molding layer on a second side of the substrate; and a semiconductor die disposed in the first molding layer and including a semiconductor device, the semiconductor device being electrically coupled to the first capacitive plate.
地址 San Jose CA US