Techniques for generating clock signals using oscillators

摘要

An integrated circuit includes first and second data channel circuits and first and second inductor-capacitor (LC) tank oscillator circuits. The first data channel circuit generates a first data signal in response to a first clock signal. The second data channel circuit generates a second data signal in response to a second clock signal. The frequencies of the first and second clock signals are substantially the same. The first LC tank oscillator circuit generates a first periodic signal. The first clock signal is generated in response to the first periodic signal. The second LC tank oscillator circuit generates a second periodic signal. The second clock signal is generated in response to the second periodic signal. The first and second LC tank oscillator circuits generate non-overlapping frequency ranges for the first and second periodic signals.

主权项

1. An integrated circuit comprising:
a first data channel circuit to generate a first data signal in response to a first clock signal; a second data channel circuit to generate a second data signal in response to a second clock signal, wherein frequencies of the first and second clock signals are substantially the same; a first inductor-capacitor (LC) tank oscillator circuit to generate a first periodic signal; and a second LC tank oscillator circuit to generate a second periodic signal, wherein the first and second LC tank oscillator circuits generate non-overlapping frequency ranges for the first and second periodic signals; a first phase-locked loop circuit comprising a first ring oscillator circuit, wherein the first phase-locked loop circuit generates the first clock signal in response to the first periodic signal; and a second phase-locked loop circuit comprising a second ring oscillator circuit, wherein the second phase-locked loop circuit generates the second clock signal in response to the second periodic signal.