| 主权项 |
1. A balanced up-conversion mixer comprising:
a negative resistance compensation circuit used to receive a direct current (DC) bias voltage, and configured to generate and output a first current and a second current based on the DC bias voltage; a load circuit used to receive the DC bias voltage; and a mixing circuit coupled to said negative resistance compensation circuit and said load circuit for receiving the first and second currents therefrom, and used to further receive a differential oscillating voltage signal pair and a differential intermediate frequency (IF) voltage signal pair, said mixing circuit being configured to allow a differential radio frequency (RF) current signal pair, which flows through said load circuit, to flow thereinto based on the first and second currents, the differential oscillating voltage signal pair and the differential IF voltage signal pair, the differential RF current signal pair having a frequency associated with those of the differential oscillating voltage signal pair and the differential IF voltage signal pair; wherein said load circuit outputs a differential RF voltage signal pair based on an impedance thereof, the DC bias voltage and the differential RF current signal pair; wherein said mixing circuit includes a current source used to modulate a total bias current flowing therethrough, a transduction unit coupled between said current source and said negative resistance compensation circuit and used to receive the differential IF voltage signal pair, said transduction unit being configured to allow a differential intermediate frequency (IF) current signal pair to flow into said current source therethrough based on the differential IF voltage signal pair, the differential IF current signal pair including the first and second currents and serving as the total bias current, and a mixing unit coupled between said transduction unit and said load circuit and used to receive the differential oscillating voltage signal pair, and the differential RF current signal pair flowing through said load circuit, said mixing unit being configured to allow, based on the differential oscillating voltage signal pair, the differential RF current signal pair to flow therethrough and into said transduction unit, the differential RF current signal pair and the first and second currents cooperatively constituting the differential IF current signal pair; the differential IF voltage signal pair including a positive-phase IF voltage signal and a negative-phase IF voltage signal, wherein: the differential IF current signal pair includes a positive-phase IF current signal and a negative-phase IF current signal; and said transduction unit includes a first input node and a second input node coupled to said mixing unit and said negative resistance compensation circuit, the negative-phase and positive-phase IF current signals flowing into said transduction unit respectively through said first and second input nodes, an output node coupled to said current source, the differential IF current signal pair flowing out of said transduction unit through said output node, a first transistor coupled between said first input node and said output node, said first transistor having a control terminal used to receive the positive-phase IF voltage signal such that said first transistor is operable to be conducting or non-conducting in response to the positive-phase IF voltage signal, a second transistor and a first inductor coupled in series between said first input node and said output node, said second transistor having a control terminal used to receive the positive-phase IF voltage signal such that said second transistor is operable to be conducting or non-conducting in response to the positive-phase IF voltage signal, a third transistor coupled between said second input node and said output node, said third transistor having a control terminal used to receive the negative-phase IF voltage signal such that said third transistor is operable to be conducting or non-conducting in response to the negative-phase IF voltage signal, and a fourth transistor and a second inductor coupled in series between said second input node and said output node, said fourth transistor having a control terminal used to receive the negative-phase IF voltage signal such that said fourth transistor is operable to be conducting or non-conducting in response to the negative-phase IF voltage signal. |
