ON-DIE ECC WITH ERROR COUNTER AND INTERNAL ADDRESS GENERATION

摘要

A memory subsystem enables managing error correction information. A memory device internally performs error detection for a range of memory locations, and increments an internal count for each error detected. The memory device includes ECC logic to generate an error result indicating a difference between the internal count and a baseline number of errors preset for the memory device. The memory device can provide the error result to an associated host of the system to expose only a number of errors accumulated without exposing internal errors from prior to incorporation into a system. The memory device can be made capable to generate internal addresses to execute commands received from the memory controller. The memory device can be made capable to reset the counter after a first pass through the memory area in which errors are counted.

主权项

1. A method for managing error correction information in a memory, comprising:
performing error detection internally within a memory device for a range of memory locations; incrementing an internal count for each error detected; generating an error result indicating a difference between the internal count and a baseline number of errors preset for the memory device, the preset based on a number of errors detected for the memory device prior to incorporation into a system; and providing the error result to an associated host of the system to expose only a number of errors accumulated after incorporation of the memory device into the system.